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New System-Level Techniques for Optimizing Signal/Power Integrity in High-Speed Interfaces--from Pioneering Innovators at Rambus, Stanford, Berkeley, and MIT
As data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design: Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field’s most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge.
Edited by pioneering experts Drs. Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy.
The authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification. Coverage includes
- New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction
- Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing
- Practical, stable formulae for converting key network parameters
- Improved solutions for difficult problems in the broadband modeling of interconnects
- Equalization techniques for optimizing channel performance
- Important new insights into the relationships between jitter and clocking topologies
- New on-chip measurement techniques for in-situ link performance testing
- Trends and future directions in signal integrity engineering
High-Speed Signaling thoroughly introduces new techniques pioneered at Rambus and other leading high-tech companies and universities: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I/O circuit designers, and system-level board design engineers.
- Sales Rank: #2616833 in Books
- Published on: 2011-10-16
- Ingredients: Example Ingredients
- Original language: English
- Number of items: 1
- Dimensions: 9.20" h x 1.25" w x 7.18" l, 2.25 pounds
- Binding: Hardcover
- 528 pages
About the Author
Kyung Suk (Dan) Oh received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Illinois, Urbana-Champaign, in 1990, 1992, and 1995, respectively. His doctoral research was in the area of computational electromagnetics applied to transmission line modeling and simulation. He is a Senior Principal Engineer at Rambus Inc. He leads signal integrity analysis for various products including serial, parallel, and memory interfaces. He is also responsible for developing advanced signal and power integrity analysis tools. His current interests include advance signal and power integrity modeling and simulation techniques, optimization of channel designs for various standard or proprietary I/O links, and application of signaling techniques to high-speed digital links.
Dr. Oh has published more than 80 papers and holds 7 issued U.S. patents and 10 pending patent applications in areas of high-speed link design. He received two Best Paper Awards in DesignCon and 2008 Best Paper Award in the IEEE Advanced Packaging journal. Dr. Oh serves on the technical program committee of IEEE EPEPS, and is a former member of the IEC DesignCon Technical Program Committee.
Xingchao (Chuck) Yuan received his B.S. degree in Electronic Engineering from Nanjing Institute of Technology (now Southeast University), Nanjing, China, in 1982. He received both his M.S. and Ph.D. degrees in Electrical Engineering from Syracuse University, Syracuse, New York, in 1983 and 1987, respectively. After receiving his Ph.D., Dr. Yuan was at the Thayer School of Engineering at Dartmouth College; first as a Postdoctoral fellow, and later as a Research Assistant Professor from 1987 to 1990.
From 1990 to 1995, Dr. Yuan was employed by Ansoft Corp., where he led the development of Ansoft’s flagship product HFSSTM (High Frequency Structure Simulator). His work led to three different product releases, which included features such as modeling conductor and dielectric loss, radiation and periodic boundary conditions for modeling antennas, and electromagnetic scattering/interference problems. He pioneered a fast frequency sweep method that combined a finite element method and an asymptotic waveform evaluation method. This led to a dramatic speed improvement in the speed of 3D full-wave modeling. From 1995 to 1998, Dr. Yuan was with Cadence Corp. where he led the research and development of the signal integrity and EMI tools. His work focused on modeling SSO noise and induced electromagnetic interference, which led to some of the earliest research in power plane modeling.
Since 1998, Dr. Yuan has been with Rambus Inc, Sunnyvale, California, as a director of signal integrity engineering. Dr Yuan is responsible for designing, modeling, and implementing Rambus multi-gigahertz signaling technologies using conventional interconnect technologies. His technical and managerial leadership at Rambus has led to an industry-recognized signal and power integrity team of experts. Rambus’ SI/PI papers are closely followed by the rest of the industry, and represent the latest developments in high-performance signal and power integrity modeling and design. Dr. Yuan’s team was among the first to apply BER and statistical methodology to memory interface designs, and to explore the relationship between the supply noise spectrum and the jitter spectrum. His team’s work led to the successful development of Rambus’ XDR memory architecture, which was adopted by PlayStation 3, DLP projectors, and DTVs. Since 2009, Dr. Yuan has served as an engineering director in charge of a silicon team with dozens of engineers (in both the U.S. and India) who are responsible for designing next-generation Rambus graphics and main memory interfaces. In 2010, the team taped out a multi-modal PHY that explores the limits of single-ended signaling beyond 12.8Gbps, a power efficient differential interface at 20Gbps, and backward compatibility with existing memory interfaces (including GDDR5 and DDR3).
Dr. Yuan has authored more than 100 papers in technical journals and conferences and holds 8 issued U.S. patents. He is a senior member of IEEE, and served on the technical program committee of IEEE EPEPS from 2008 to 2009.
Most helpful customer reviews
4 of 4 people found the following review helpful.
Don't waste your money on this: bad writing, get the papers for the results
By John
I was really disappointed with this book. It does not explain enough detail any of the major concepts. The book does not even attempt to explain some of the basic concepts but it merely copies the analysis results from formerly published papers. Some of the important subjects in this book are well covered by the other authors who developed the techniques in their original papers.
There are many well written papers that explain the subject matter clearly and accurately. I have no idea why this book is in such bad shape, and was published in the first place. I came across recently over several bad books on related subjects. Some of the equally bad books include, "Timing Analysis and Simulation for Signal Integrity Engineers" by G. Edlund and "Power Integrity for I/O Interfaces:" by V. Pandit et al.
The authors (co-editors) should understand that writing a book is not the same as scouring existing literature and getting permission to reprint articles and publishing it in a book. It is a collection of papers with no continuity. The flow and style of the writing is very bad.
I agree with the other negative reviews. The book is a complete waste of time and money. It is hard to understand why anyone will be willing to pay for unedited and freely available papers.
3 of 4 people found the following review helpful.
Be careful there are No numerical example in this Book
By Fariad
You know I hate to rate a book with one star! Why would you write a book that only has boring Math formulas? At many instances only one paragraph explains the topic. It is completly waste of time. Many pictures are poor and useless. The title is tempting but hardly any example given that describe th workability of material. I guess the only good think is the refrences on the end of chapter which you can use to get IEEE and other publications to help you. But again why bother with the book. Please Please Please do not write a book if you just transfering formula from technical publication in there. The purpose of the book or text book is to barke the problem down with numerical example9s) to show how formula used and misused. This is one of the many "Prentice Hall" signal integrity publication that absoultly useless...Very frustrating..I guess as an instructor I have to write my own book and spend eternity creating my lecture notes...Sad very sad...
0 of 0 people found the following review helpful.
This book is really helpful for SI/PI engineer especially for DDR application
By pantheon
This book is not easy to understand.
But I believe it has many valuable ideas and methods for the problems we are typlically facing in the real products.
I found two books are very helpful in recent 5 years. one is this book and the other is Advanced Signal Integrity for High-Speed Digital Designs.
See all 4 customer reviews...
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